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also used by CCRS (Princz, 1982) and DFVLR (Gredel, 1982). Soon after the 
availability of digitally processed SEASAT images, similar developments were 
started by the Japanese industry and led to comparable configurations. 
With only two exceptions, the basic algorithm used is Range Compression fol- 
lowed by Azimuth Compression, both operations performed in the frequency 
domain. However, there are many differences in the way the range migration is 
corrected, the looks are extracted, the data are quantized and resampled from 
slant- to ground-range. The exceptions are the RAE processor which performs 
the azimuth compression in the time domain (resulting in lower throughput 
capability) and the first CRC-processor which is the only processor with a 
two-dimensional convolution implemented. This design was driven by require- 
ments to process data of an airborne squinted SAR. An interesting RC/AC 
alternative for squinted SAR's has been developed recently (Vant, 1983). 
Initially all SAR processors were developed to process only data of the SEA- 
SAT L-Band SAR. Most of them included beam tracking (clutter lock) routines 
to refine. the‘ attitude-' data. -'With:. the" .availability | of^- airborne 
multi-frequency SAR data from the Canadian CV-580 aircraft some processors 
became more flexible. Autofocus routines were added in many cases to precise- 
ly estimate the sensor velocity from the data. 'Beam tracking' and 
'autofocus' allow. autonomous processor operation without a need for accurate 
„Orbit and attitude information. 
The throughput of the 'type 2' configurations was initially in the order of 
10 to 100 hours for a full swath SEASAT image. Today this varies from 3 to 30 
hours, where the fastest implementation still is the JPL processor which has 
now three AP120B' attached to its SEL 32/77 host computer (Barkan, 1981) and 
will interface a fourth unit for SIR-B data processing. 
The "type 2' configurations are the only configurations that were ever used 
for operational processing of SAR data (SEASAT, CV-990 and CV-580). This was 
done at JPL, CCRS, RAE and DFVLR. However, in view of the future satellite 
SAR sensors, the present 'type 2' configurations are not capable to meet the 
processing demands, which at least require 'no backlog' processing. This 
requires a 10 to 100 times better throughput performance. 
The present 'type 2' implementations have no significant growth potential. 
This is primarily related to fact that in nearly all installations the host 
computer is completely involved in all data transfers between host disks and 
attached vector processor. As the computational rate of the array processor 
increases, the addition of array processors makes the SAR processor to become 
I/O-bound. The solution to this problem is to completely transfer the algo- 
rithm to the array processor and attach private disks. Such a configuration 
was recently implemented at JHU/APL (Raff, 1983) on a VAX 780/AP 164 config- 
uration with four disk drives. The VAX only provided data input/output via 
tape. The AP 164 has an increased wordlength, more memory but the same compu- 
tational speed compared to the AP 120 B. Without any tuning the processing 
time for a 100 km x 100 km SEASAT image was 5.6 hours. 
A similar concept was analysed recently by DFVLR. It was found that a new 
generation array processor (ST100 from STAR Technology with 100 MFLOPS) with 
high speed and high capacity disk drives (10 MByte/sec block transfer rates) 
and direct raw data input, an ERS-1 full swath image can be generated in 15 
minutes. The host computer then only performs control functions. The realisa- 
tion of this concept started at DFVLR. 
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