d B 
'act 
eld 
cts 
Ala- 
the 
all 
ert- 
ds. 
‘be 
is 
ra 
it 
ive 
) to 
tic 
s is 
Et 
Nords, 
of 
17 
— —— 
Memory-reference instructions permit reading the 
contents of memory locations to the accumulators 
and index registers, the addition or subtraction of 
memory words to or from the contents of the regis- 
ters, and the storage of the register contents in speci- 
fied memory locations. Double-precision instructions 
permit these operations to be performed by treating 
the two accumulators as a single 36-bit register. 
Two multiplication instructions have been pro- 
vided. One performs a normal, signed, single-precision 
multiplication; the other performs a positive multipli- 
cation to handle the least-significant, positive partial 
products of double-precision multiplications. The 
time required to form a programmed double-precision 
product of two double-precision operands is 28 
microseconds. 
Similar care has been taken in implementing the 
division operation. All remainders are hardware- 
corrected to a form permitting easy program manipu- 
lation. The quotient of two double-precision signed 
numbers can be obtained in 50 microseconds. 
Data interchanges between memory and the first 
accumulator are accomplished through the use of the 
operand-address register as temporary data storage. 
The operand-address register is also used to imple- 
ment an increment-memory-and-skip instruction, 
which does not affect the contents of any of the 
normal working registers. 
The adder-trace register stores four types of in- 
formation concerning the results of each arithmetic 
operation. The sign of the last sum of operands is 
stored. If the last sum was zero, or if it caused an 
overflow, the corresponding bits in the adder-trace 
register are set. The fourth trace, divide check, is set 
when an attempted division would not produce a 
properly scaled result; the programmer is thus al- 
lowed to either recover the operands or to obtain a 
correct quotient by means of simple programming 
techniques. As with the other registers, the contents 
of the adder-trace register may be transferred to and 
from memory, permitting the entire internal status of 
the computer to be saved and re-established at the 
beginning and end, respectively, of a program inter- 
rupt. The divide-check and overflow conditions may, 
at the programmer’s discretion, cause a first-priority 
program interrupt. 
The shift-counter is involved in controlling the 
multiplication and division operations, as well as the 
specification of the desired number of bits to be 
shifted or rotated in the corresponding instructions. 
It is also used in conjunction with the normalize in- 
struction to indicate the magnitude of a number, thus 
facilitating proper scaling in the conversion from 
floating-point to fixed-point notation. 
The methods of addressing permit efficient utiliza- 
18 
tion of all areas of memory. The memory is paged 
into 512-word sectors. A 3-bit modifier in each 
memory-reference instruction permits such an in- 
struction to directly address any of the first 2,048 
memory locations, or any location in the current 512 
word sector as indicated by the contents of the pro- 
gram counter. Positive and negative relative address- 
ing are provided to permit quick access to operands 
stored in the preceding or following sectors of 
memory. 
The operand-address register is normally used to 
store the memory address of the data (i.e., the oper- 
and). Its contents are modified as required to permit 
infinite-level indirect addressing. Furthermore, rela- 
tive or indexed addressing is permitted before, during, 
or after multilevel indirect operations. 
INPUT-OUTPUT SYSTEM 
As has been pointed out, a computer used in a 
real-time control system must strike the proper bal- 
ance between its three major functions: the acquisi- 
tion of data and operator instructions, the processing 
of these data, and the transmission of the controlled 
variables to the system. If the control algorithm is 
complex and the required solution rate is high, it is of 
primary importance that input-output operations do 
not appreciably reduce the available computation 
time. The input-output system of the Bx-272 has 
been designed to accomplish this objective. 
An initial-loading system has been provided to 
facilitate program loading. This hardware provides for 
the assembly of ASCII-coded octal numbers, read by 
a paper tape reader, or typed onto a typewriter key- 
board, into words residing in the first accumulator. 
These words are interpreted either as memory ad- 
dresses or as data to be stored, depending upon which 
of several control characters are received. The system 
is thus flexible enough to permit the efficient loading 
of noncontiguous segments of core. 
Communication between the computer and the 
other parts of the system takes place by one of two 
means: program-controlled transfers and DMA (direct 
memory access) transfers. Of the two, the latter is 
faster, but it requires a more elaborate device inter- 
face. Program-controlled transfers are, therefore, the 
primary means of communication and are designed to 
transfer a maximum amount of information and con- 
trol in as little time as possible. The I/O (Input- 
Output) cycle time is 0.875 microsecond. 
Program-controlled transfers are accomplished as 
parallel data transfers which are initiated by multi- 
function control instructions. Each device interface 
provides a buffer register for at least one byte of 
information. Data is transmitted between one of 
KAMM, FOLAND, VAN ANDEL, BEHR, AND CHILDS