The MTS8870D is a complete DTMF
receiver consisting of digital decoder. The
decoder uses digital counting techniques to
detect and decode all 16 DTMF tone-pairs into a
4-bit code. The output 4-bit code is given as
input to the microcontroller.
I.A.3. Microcontroller (ATM89C51)
Microcontroller is the heart of the robot.
Microcontroller is the main controlling unit of
the robot. We are using microcontroller
At89C51. The At89C51 is a low-power, high-
performance CMOS 8-bit microcomputer with
4K bytes of Flash programmable and erasable
read only memory (PEROM).
[.A.4. Drive Control Logic And Peripheral
Control Logic
Drive control logic consists of relay boards.
DC motors are connected to these relay boards.
A relay is an on/off switch that you can control
electronically.
I. A.5. Wireless Camera
We are using Wireless camera Xcam2 in our
project. It consists of a Built-in 2.4 GHz Video
Sender.
I. B. Experimental
The main controlling technique using DTMF
can be explained as follow:
Integrated DTMF Receiver
I. B. 1. Features: It has low power consumption,
adjustable guard time, inhibit mode. These
are the features, which we have used.
[. B. 2. Applications : It is widely used in
Receiver system for British Telecom, Paging
systems, Repeater systems/mobile radio,
Credit card systems, Remote control,
Personal computers, Telephone answering
machine, etc.
International Archives of the Photogrammetry, Remote Sensing and Spatial Information Sciences, Vol XXXV, Part B5. Istanbul 2004
II. DESCRIPTION
The MT8870D/MT8870D-1 is a complete
DTMEF receiver integrating both the band split
filter and digital decoder functions. The filter
section uses switched capacitor techniques for
high and low group filters; the decoder uses
digital counting techniques to detect and decode
all 16 DTMF tone pairs into a 4-bit code.
External component count is minimized by on
chip provision of a differential input amplifier,
clock oscillator and latched three-state bus
interface.
II. A. Functional Description
The MT$8870D/MT8870D-1 monolithic
DTMF receiver offers small size, low power
consumption and high performance. Its
architecture consists of a band split filter
section, which separates the high and low group
tones, followed by a digital counting section
which verifies the frequency and duration of the
received tones before passing the corresponding
code to the output bus.
II. A. 1. Filter Section : Separation of the low-
group and high group tones is achieved by
applying the DTMF signal to the inputs of
two sixth-order switched capacitor band pass
filters, the bandwidths of which correspond
to the low and high group frequencies. The
filter section also incorporates notches at
350 and 440 Hz for exceptional dial tone
rejection.
II. A. 2. Decoder Section : Following the filter
section is a decoder employing digital
counting techniques to determine the
frequencies of the incoming tones and to
verify that they correspond to standard
DTMF frequencies. A complex averaging
algorithm protects against tone simulation
by extraneous signals such as voice while
providing tolerance to small frequency
deviations and variations.
Steering Circuit: Before registration of à
decoded tone pair, the receiver checks for a