20 
  
  
  
  
491 
The vector processor consists of the scalar unit, the vector unit and the 
main memory unit, The scalar unit is equipped with 16 general purpose registers 
(GPR ) , 8 floating point registers (FLPR) and 64 KB of cache memory. The 
vector unit mainly consists of vector registers, mask registers and six 
functional pipeline units, such as an add//logical pipe, a multiply pipe, a 
divide pipe, a mask pipe and two load store pipes. The first three pipes 
perform arithmetic operations and the mask pipe performs logical operations 
assoclated with the mask vectors. 
Many kinds of concurrent operations can be processed in the vector 
processor. In the vector unit five functional pipelines can operate concurrently 
; two out of three arithmetic pipeline units, two load//store pipes and a mask 
pipe. Within each arithmetic pipeline unit, vector operands associated wi th 
consecutive instructions can flow continuously. The vector unit and the scalar 
unit can also operate concurrently. 
MASK REGISTERS 
1KE/0.5KB 
   
   
VECTOR UNIT 
SCALAR UNIT 
  
  
  
AR 
= 
GPR : GENERAL PunPOSE REGISTERS 
ELPR : FLOATING PoINT REGISTERS 
FIG. 2 FAM VECTUR LOCK DIAGRAM ( VP-200 / VP-100 2